Differential Evolution under Fixed Point Arithmetic and FP16 Numbers

In this work, the differential evolution algorithm behavior under a fixed point arithmetic is analyzed also using half-precision floating (FP) numbers of 16 bits, and these last are known as FP16. paper, it considered that important to analyze (DE) in circumstances with goal reducing its consumption power, storage size variables, improve speed behavior. All aspects become if one needs design dedicated hardware, an embedded DE within circuit chip, performs optimization. With conditions tested three common multimodal benchmark functions: Rosenbrock, Rastrigin, Ackley, 10 dimensions. Results obtained software by simulating all C programming language.